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Español64B/66B ENCODING
(Redirected from 64B/66B encoding)
In data networking and transmission, '64B/66B' is a line code that transforms 64-bit data to 66-bit line code to achieve DC-balance and bounded disparity, and yet provide enough state changes to allow reasonable clock recovery. This means that there are just as many "1"s as "0"s in a string of two symbols, and that there are not too many "1"s or "0"s in a row. This is an important attribute in a signal that needs to be sent at high rates because it helps reduce intersymbol interference.
The overhead of the 64B/66B encoding is considerably less than the more common 8b/10b encoding scheme.
As the scheme name suggests, 64 bits of data are transmitted as a 66-bit entity.
The 66 bit entity is made by pre-pending one of two possible two-bit 'preambles' to the 64 bits to be transmitted.
★ If the preamble is '01', the 64 bits are entirely data
★ If the preamble is '10', the 64 bits are a mixture of control information and data
★ The preambles '00' and '11' are not used, and generate an error if seen.
The use of the '01' and '10' preambles guarantees a bit transition every 66 bits, which means that a continuous stream of '0's or '1's cannot be valid data. It also allows easier clock/timer synchronization, as a transition must be seen every 66 bits.
The 64 bits of data are scrambled using a self-synchronous scrambler function, with the intention of ensuring that a relatively even distribution of '1's and '0's are normally found in the transmitted data. The intention is not to encrypt the data, but to give the transmitted data useful engineering properties. This does not guarantee that pathological data will not generate a transmitted output that has all '0's or all '1's or other undesirable properties, but simply reduces the probability that this will occur with normal data. This method is different to the codebook based approach of 8B/10B encoding.
The encoding is normally done entirely in hardware, using a linear feedback shift register. Upper layers of the software stack should be "unaware" that this encoding is being used.
★ Fibre Channel 10GFC
★ 10 gigabit Ethernet
★ 8B/10B encoding
★ Line code
★ 64b/66b low-overhead coding proposal for serial links (update 1/12/00)
:Note that this is the original proposal to the IEEE, and some changes were made for the final, agreed standard e.g. the scrambling polynomial is neither of the two options outlined in the paper, but actually x58+x39+1
★ PatentView/EP1133123 Software Patent: 64b/66b decoding, for packetized serial data
★ ERROR CORRECTION ON 64/66 BIT ENCODED LINKS
★ Introduction to 10 Gigabit 64b/66b (Clause 49).
In data networking and transmission, '64B/66B' is a line code that transforms 64-bit data to 66-bit line code to achieve DC-balance and bounded disparity, and yet provide enough state changes to allow reasonable clock recovery. This means that there are just as many "1"s as "0"s in a string of two symbols, and that there are not too many "1"s or "0"s in a row. This is an important attribute in a signal that needs to be sent at high rates because it helps reduce intersymbol interference.
The overhead of the 64B/66B encoding is considerably less than the more common 8b/10b encoding scheme.
| Contents |
| How it works |
| Technologies that use it |
| See also |
| External links |
How it works
As the scheme name suggests, 64 bits of data are transmitted as a 66-bit entity.
The 66 bit entity is made by pre-pending one of two possible two-bit 'preambles' to the 64 bits to be transmitted.
★ If the preamble is '01', the 64 bits are entirely data
★ If the preamble is '10', the 64 bits are a mixture of control information and data
★ The preambles '00' and '11' are not used, and generate an error if seen.
The use of the '01' and '10' preambles guarantees a bit transition every 66 bits, which means that a continuous stream of '0's or '1's cannot be valid data. It also allows easier clock/timer synchronization, as a transition must be seen every 66 bits.
The 64 bits of data are scrambled using a self-synchronous scrambler function, with the intention of ensuring that a relatively even distribution of '1's and '0's are normally found in the transmitted data. The intention is not to encrypt the data, but to give the transmitted data useful engineering properties. This does not guarantee that pathological data will not generate a transmitted output that has all '0's or all '1's or other undesirable properties, but simply reduces the probability that this will occur with normal data. This method is different to the codebook based approach of 8B/10B encoding.
The encoding is normally done entirely in hardware, using a linear feedback shift register. Upper layers of the software stack should be "unaware" that this encoding is being used.
Technologies that use it
★ Fibre Channel 10GFC
★ 10 gigabit Ethernet
See also
★ 8B/10B encoding
★ Line code
External links
★ 64b/66b low-overhead coding proposal for serial links (update 1/12/00)
:Note that this is the original proposal to the IEEE, and some changes were made for the final, agreed standard e.g. the scrambling polynomial is neither of the two options outlined in the paper, but actually x58+x39+1
★ PatentView/EP1133123 Software Patent: 64b/66b decoding, for packetized serial data
★ ERROR CORRECTION ON 64/66 BIT ENCODED LINKS
★ Introduction to 10 Gigabit 64b/66b (Clause 49).
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