INTEL 8080

The 'Intel 8080' was an early microprocessor designed and manufactured by Intel. The 8-bit CPU was released in April 1974 running at 2 MHz (at 640,000 instructions per second), and is generally considered to be the first truly usable microprocessor CPU design. It was implemented in NMOS.

Contents

Description

Programming model

Registers

Commands

16-bit operations

Input/output scheme

Input output port space

Stack space

Shared memory implementations

The internal state word

Pin usage

Physical implementation

The industrial impact

Applications and successors

Industry change

History

Patent

Trivia

See also

External links

Description

Programming model

The Intel 8080 was the successor to the Intel 8008; this was due to its being assembly language source-compatible, since it used the same instruction set developed by Computer Terminal Corporation. The 8080's large 40 pin DIP packaging permitted it to provide a 16-bit address bus and an 8-bit data bus, allowing easy access to 64 kilobytes of memory.

Registers

The processor had seven 8-bit registers, six of which could be combined into three 16-bit register pairs (BC, DE and HL). It also had the 8-bit accumulator, the 16-bit stack pointer to memory (replacing the 8008's internal stack), and a 16-bit program counter.

Commands

Most of the 8-bit operations were possible between the accumulator and either one of the registers or the memory cell, indexed by the 16-bit value of the register pair HL. Moving operations were supported between any two registers, or between any register and the HL-indexed memory cell. Due to the highly regular machine code format for MOV commands, the opcodes included those for moving a byte from a given register into the same register (MOV A,A , for instance). These commands were seldom used, however, unless programmed delays were needed. What would have been instruction to move from the HL-indexed memory cell into the same memory cell (i.e., MOV M,M) instead was HLT (for halt). HLT halted the processor until external reset or interrupt signals were received.
All processor commands were coded by one byte, but some of them were followed by one or two bytes of data, a memory address, or a port number. The register-to-register data-move commands were all coded by one byte, making up about a quarter of the commands in the processor-command system. The processor had 8 commands to call the subroutines located at the fixed addresses at the beginning or the address space (RST). These commands were frequently used in the interrupt-handling or system-library calls.
The most sophisticated command (and the longest to execute) was XTHL, which was used for exchanging the register pair HL with the value stored at the address indicated by the stack pointer.

16-bit operations

Despite the fact that the 8080 was generally an 8-bit processor, it was also able to load immediate any register pair (LXI), increment or decrement any register pair (INX, DCX), add the register pairs (DAD), switch HL with DE (XCHG) and perform the 16-bit arithmetical shift (DAD H) with one command. Hence some 16-bit operations were already possible.

Input/output scheme

Input output port space

The 8080 supported up to 256 input/output (I/O) ports, accessed from programs via dedicated I/O instructions—each instruction taking an I/O port address as its operand. This scheme—using a separate I/O address space—is now less commonly used than memory mapping of I/O ports/devices. At the time of the 8080's launch, this I/O mapping scheme was seen as an advantage, as it freed up the processor's limited number of address pins for the memory address space. In most other CPU architectures, however, the mapping of I/O ports in a common address space both for memory and I/O, gave a simpler instruction set; no need for separate I/O instructions. The 8080-style I/O port scheme continued into the Intel 8085 and x86 families of microprocessors, as well as the Zilog Z80 series.

Stack space

One of the bits in the processor state word (see below) was indicating that the processor is accessing data from the stack. Using this signal, it was possible to implement a separate stack memory space. However this feature was seldom used.

Shared memory implementations

The 8080 has shared control signals for reading and writing both memory and I/O ports. In basic computers, the 8080 was frequently connected using a shared memory map, accessing ports as memory cells. In such machines, the specialised I/O commands were either not used or, in applications with little memory, were used knowing that the processor would clone the 8-bit port address to a higher address byte (IN 0x05 would produce 0x0505 on the 16-bit address bus).

The internal state word

For more advanced systems, during one phase of its working loop the processor set its "internal state byte" on the data bus. This byte contains flags which indicate whether the memory or I/O port is accessed and whether it was necessary to handle an interrupt.
The interrupt system state (enabled or disabled) was also output on a separate pin. For simple systems, where the interrupts were not used, it is possible to find cases where this pin is used as an additional single-bit output port (the popular Radio86RK computer made in USSR, for instance).

Pin usage

The address bus had its own 16 pins, and the data bus had 8 pins that were possible to use without any multiplexing. Using the two additional pins (read and write signals), it was possible to assemble simple microprocessor devices very easily. Only the separate IO space, interrupts and DMA required additional chips to decode the processor pin signals. However the processor load capacity was limited, and even simple computers frequently contained bus amplifiers.
The processor required three power sources (-5, +5 and +12 Volt(V)) and two non-interlacing high-amplitude synchronization signals. However at least the late Soviet version КР580ВМ80А was able to work with the single +5 V power source, +12 V pin being connected to the same +5 V and -5 V pin - to the ground. The processor consumed about 1.3 watts (W) of power.
The pinout table, from the chip's accompanying documentation, described the pins as follows:

Pin number	Signal	Type	Comment
1	A10	Output	Address bus 10
2	GND	-	Ground
3	D4	Bidirectional	Bidirectional data bus. The processor also transiently sets here the "processor state", providing information that the processor is currently doing: ★ D0 reading interrupt command. In response to the interrupt signal, the processor was reading and executing a single arbitrary command with this flag raised. Normally the supporting chips provided the subroutine call command (CALL or RST), transferring control to the interrupt handling code. ★ D1 reading (low level means writing) ★ D2 accessing stack (probably the separate stack memory space was initially planned) ★ D3 doing nothing, has been halted by the HLT command ★ D4 writing data to the output port ★ D5 reading the first byte of the executable command ★ D6 reading data from the input port ★ D7 reading data from memory
4	D5
5	D6
6	D7
7	D3
8	D2
9	D1
10	D0
11	-5 V	-	The -5 V power supply. This must be the first power source connected and the last disconnected, otherwise the processor will be damaged.
12	R	Input	Reset. The signal forces execution of commands, located at address 0000. The content of other processor registers is not modified. This is an inverting input (the active level being logical 0)
13	DMA	Input	Direct memory access request. The processor is requested to switch the data and address bus to the high impedance ("disconnected") state.
14	INT	Input	Interrupt request
15	CLC2	Input	The second phase of the clock generator signal
16	ACK INT	Output	The processor had two commands for setting the 0 or 1 level on this pin. The pin normally was supposed to be used for the interrupt control. However in the simple computers it was sometimes used just as the single bit output port for various purposes.
17	RD	Output	Read (the processor reads from memory or input port)
18	WR	Output	Write (the processor writes to memory or output port). This is the inverted output, the active level being logical zero.
19	S	Output	The active level indicates that the processor has set the "state word" on the data bus. The various bits of this state word provided the additional information for supporting the separate address and memory spaces, interrupts and direct memory access. This signal required to pass through additional logic before it could be used to write the processor state word from the data bus into some register.
20	5 V	-	The + 5 V power supply
21	ACK DMA	Output	Direct memory access confirmation. The processor switches data and address pins into the high impedance state, allowing other device to manipulate the bus
22	CLC1	Input	The first phase of the clock generator signal
23	RDY	Input	Wait. With this signal it was possible to suspend processor's work. It was also used to support the hardware-based step-by step debugging mode.
24	WAIT	Output	Wait (indicates that the processor is in the waiting state)
25	A0	Output	Address bus
26	A1
27	A2
28	12 V	-	The +12 V power supply. This must be the ''last'' connected and first disconnected power source.
29	A3	Output	The address bus, can switch into high impedance state on demand
30	A4
31	A5
32	A6
33	A7
34	A8
35	A9
36	A15
37	A12
38	A13
39	A14
40	A11

Literature, used for this table:

★ http://tehno-doc.nm.ru/mikroshem_rus/kr580/kr580vm80a.html

★ http://www.radiomaster.ru/stati/radio/k580/14_k580.php

Physical implementation

The 8080 integrated circuit was manufactured in a NMOS process using a minimum feature size of 6 µm. A single layer of metal was used to interconnect the approximately 6000 transistors in the design (the higher resistance polysilicon layer required to implement transistor gates was also used for some interconnects). The die size was approximately 20 mm².

The industrial impact

Applications and successors

The 8080 was used in many early microcomputers, such as the MITS Altair 8800 Computer, Processor Technology SOL-20 Terminal Computer and IMSAI 8080 Microcomputer, forming the basis for machines running the CP/M operating system (the later, fully compatible and more capable, Zilog Z80 processor would capitalize on this, with Z80 & CP/M becoming the dominant CPU & OS combination of the period much like x86 & MS-DOS for the PC a decade later). The first single-board microcomputer was based on the 8080. The company Landis & Gyr used it on its electrical metering data acquisition equipment, the Datagyr FAB during the early eighties.
In addition, several early arcade video games were built around the 8080 microprocessor. ''Space Invaders'' was perhaps the most popular such title.
Shortly after the launch of the 8080, the Motorola 6800 competing design was introduced, and after that, the MOS Technology 6502 variation of the 6800. Zilog introduced the Z80, which had a compatible machine-language instruction set and initially used the same assembly language as the 8080, but for legal reasons, Zilog developed a syntactically-different alternative assembly language for the Z80. At Intel, the 8080 was followed by the compatible and electrically more elegant 8085, and later by the assembly language compatible 16-bit 8086 and then the 8/16-bit 8088, which was selected by IBM for its new PC to be launched in 1981. The 8080, via its ISA, thus made a lasting impact on computer history.
The Soviet Union manufactured a complete 8080 analog named KP580ИK80 (later marked as KP580BM80), where even the pins were placed identically. This processor was the base of the Radio86RK (Радио 86РК in Russian), probably the most popular amateur single-board computer in the Soviet Union. Radio86RK's predecessor was the Micro-80 (Микро-80 in Russian), and its successor the Orion-128 (Орион-128 in Russian) which had a graphical display. Both were built on the KP580 processor. According to some sources, the Soviet analog had two undocumented instructions, specific to itself; however, these were not widely known.

Industry change

The 8080 also changed how computers were created. When the 8080 was introduced, computer systems were usually created by computer manufacturers such as Digital Equipment Corporation, Hewlett Packard, or IBM. A manufacturer would produce the entire computer, including processor, terminals, and system software such as compilers and operating system. The 8080 was actually designed for just about any application ''except'' a complete computer system. Hewlett Packard developed the HP 2640 series of smart terminals around the 8080. The HP 2647 was a terminal which ran BASIC on the 8080.
Microsoft would create the first popular programming language for the 8080, and would later acquire DOS for the IBM-PC.
As the 8080 evolved into the largely compatible x86 family, PCs evolved into workstations and servers of 16, 32 and 64 bits, with advanced memory protection, segmentation, and multiprocessing features, blurring the difference between small and large computers (the 80286 and 80386's protected mode were important in doing so). The size of chips has grown so that the size and power of large x86 chips is not much different from high end architecture chips, and a common strategy to produce a very large computer is to network many x86 processors.
The basic architecture of the 8080 and its successors has replaced many proprietary midrange and mainframe computers, and withstood challenges of technologies such as RISC. Most computer manufacturers have abandoned producing their own processors below the highest performance points. Though x86 may not be the most elegant, or theoretically most efficient design, the sheer market force of so many dollars going into refining a design has made the x86 family today, and will remain for some time, the dominant processor architecture, even bypassing Intel's attempts to replace it with incompatible architectures such as the iAPX 432 and Itanium.

History

Federico Faggin was the originator of the 8080 architecture in early 1972, proposed it to Intel's management and pushed for its implementation. He finally got the permission to develop it six months later. Faggin hired Masatoshi Shima from Japan who did the detailed design under his direction. Stan Mazor contributed a couple of instructions to the instruction set.

Patent

US # 4,010,449. March 1, 1977. Federico Faggin, Masatoshi Shima, Stanley Mazor: "MOS computer employing a plurality of separate chips."

Trivia

★ Asteroid (8080) Intel reflects the name of this processor. [1]

See also

★ CP/M

External links

★ Intel and other manufacturers' 8080 CPU images and descriptions at cpu-collection.de

★ Scan of the Intel 8080 data book at datasheetarchive.com