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(Redirected from NAND gate)
The 'Sheffer stroke', written "|" or "↑", in the subject matter of boolean functions, propositional calculus, sentential calculus, or zeroth order logic denotes a logical operation that is equivalent to the negation of the conjunction operation, expressed in ordinary language as "not both". It is also called the 'alternative denial', since it says in effect that at least one of its operands is false. In Boolean algebra and digital electronics it is known as the 'NAND operation' ("not and").
Like 'NOR' alone, it is one of the two sole sufficient operators or functionally complete binary operators which can be used to express all of the boolean functions of propositional logic.
The 'NAND operation' is a logical operation on two logical values, typically the values of two propositions, that produces a value of ''false'' if and only if both of its operands are true. In other words, it produces a value of ''true'' if and only if at least one of its operands is false.
The truth table of 'p NAND q' (also written as 'p | q' or 'p ↑ q') is as follows:
The Venn Diagram of "A nand B" (the white area is the area covered by NAND).
The stroke is named for Henry M. Sheffer, who proved (Sheffer 1913) that all the usual operators of propositional logic (not, and, or, implies, and so on), could be expressed in terms of it. Charles Peirce (1880) had discovered this fact more than 30 years earlier, but never published his finding. Peirce also observed that all boolean operators could be defined in terms of the NOR operator, the dual of NAND.
Nand does not possess any of the following five properties, each of which is required to be absent from at least one member of a set of functionally complete operators: truth-preservation, falsity-preservation, linearity, monotonicity, self-duality. An operator is truth- (falsity-) preserving if its value is truth (falsity) whenever all its arguments are truth (falsity).
One way of expressing ''p'' NAND ''q'' is as , where the symbol signifies ''AND'' and the line over the expression signifies ''not'', the logical negation of that expression.
NAND is not used in everyday sentences because it exhibits an inherent inversion, which makes it confusing like a double negative. Here's an example of a sentence using:
:NAND operator: ''We will surely die if we have food 'nand' water.''
:Common terms: ''We will surely die if we do not have both food and water.''
The Sheffer stroke "|" is equivalent to the negation of conjunction:
:
Expressed in terms of NAND, the usual operators of propositional logic are:
The 'NAND gate' is a digital logic gate that behaves in a manner that corresponds to the truth table to the left. A LOW output results only if both the inputs to the gate are HIGH. If one or both inputs are LOW, a HIGH output results.The nand gate is a universal gate in the sense that any boolean function can be implemented by nand gates.
Digital systems employing certain logic circuits take advantage of NAND's functional completeness. In complicated logical expressions, normally written in terms of other logic functions such as AND, OR, and NOT, writing these in terms of NAND saves on cost, because implementing such circuits using NAND gate yields a more compact result than the alternatives.
There are two symbols for NAND gates: the 'military' symbol and the 'rectangular' symbol. For more information see logic gate symbols.
NAND gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs.
The standard, 4000 series, CMOS IC is the 4011, which includes four independent, two-input, NAND gates.
These devices are available from most semiconductor manufacturers such as Fairchild Semiconductor, Philips or Texas Instruments. These are usually available in both through-hole DIL and SOIC format. Datasheets are readily available in most datasheet databases.
The standard 2-, 3-, 4- and 8-input NAND gates are available:
★ CMOS
★
★ 4011: Quad 2-input NAND gate
★
★ 4023: Triple 3-input NAND gate
★
★ 4012: Dual 4-input NAND gate
★
★ 4068: Mono 8-input NAND gate
★ TTL
★
★ 7400: Quad 2-input NAND gate
★
★ 7410: Triple 3-input NAND gate
★
★ 7420: Dual 4-input NAND gate
★
★ 7430: Mono 8-input NAND gate
The NAND gate is the easiest to manufacture, and also has the property of functional completeness. That is, any other logic function (AND, OR, etc.) can be implemented using only NAND gates. An entire processor can be created using NAND gates alone.
The following is an example of a formal system based entirely on the Sheffer stroke, yet having the functional expressiveness of the propositional logic:
A B C D E F G '
( | )
The Sheffer stroke commutes but does not associate. Hence any formal system including the Sheffer stroke must also include a means of indicating grouping. We shall employ '(' and ')' to this effect.
The letters A, B, C, D, E, F and G are atoms.
Any of these letters primed once or several times is also an atom (e.g. A', B′′, C′′′, D′′′′ are atoms).
''Construction Rule I:'' An atom is a well-formed formula (''wff'').
''Construction Rule II:'' If X and Y are wffs, then (X|Y) is a wff.
''Closure Rule:'' Any formulae which cannot be constructed by means of the first two Construction Rules is not a wff.
The letters U, V, X, and Y are metavariables standing for wffs.
A decision procedure for determining whether a formula is well-formed goes as follows: "deconstruct" the formula by applying the Construction Rules backwards, thereby breaking the formula into smaller subformulae. Then repeat this recursive deconstruction process to each of the subformulae. Eventually the formula should be reduced to its atoms, but if some subformula cannot be so reduced, then the formula is not a wff.
The following ''wff''s are axiom schemata, which become axioms upon replacing all metavariables with ''wff''s.
''THEN-1:'' (U|(U|(V|(U|U))))
''Substitution of equivalents''. Let the wff X contain one more instances of the subformula U. If U=V, then replacing one ore more instances of U in X by V does not alter the truth value of X. In particular, if X=Y is a theorem, this remains the case after any substitution of V for U.
''Commutativity:'' (X|Y) = (Y|X)
''Duality:'' If strings of the forms X and (X|X) both show up in a theorem, then if these two strings are swapped wherever they appear in the theorem, then the result will also be a theorem.
''Double Negation:'' ((X|X)|(X|X)) = X
''Mimesis:'' (U|(X|X)) = (U|(U|X))
''THEN-3:'' (U|(U|(V|(V|X)))) = (V|(V|(U|(U|X))))
''MP-1:'' U, (U|(V|X)) |- V
''MP-2:'' U, (U|(V|X)) |- X
Note. The formula (U|(V|X)) has the interpretation U→V∧X. Modus ponens is the special case of MP-1 and MP-2 when V and X are identical.
Since the only connective of this logic is |, the symbol | could be discarded altogether, leaving only the parentheses to group the letters. A pair of parentheses must always enclose a pair of ''wff''s. Examples of theorems in this simplified notation are
: (A(A(B(B((AB)(AB)))))),
: (A(A((BB)(AA)))).
The resemblance to the syntax of LISP is evident.
The notation can be simplified further, by letting
: (U) := (UU)
: ((U)) U
for any U. This simplification causes the need to change some rules: (1) more than two letters are allowed within parentheses, (2) letters or wffs within parentheses are allowed to commute, (3) repeated letters or wffs within a same set of parentheses can be eliminated. The result is a parenthetical version of the Peirce existential graphs.
★ Ampheck
★ AND gate
★ Boolean domain
★ CMOS
★ Laws of Form
★ Logic gate
★ Logical graph
★ NOR gate
★ NOT gate
★ OR gate
★ Peirce's law
★ Peirce arrow = NOR
★ Propositional logic
★ Sole sufficient operator
★ XOR gate
★ Zeroth order logic
★ Charles Peirce, 1880. 'A Boolean Algebra with One Constant'. In Hartshorne, C, and Weiss, P., eds., (1931-35) ''Collected Papers of Charles Sanders Peirce, Vol. 4'': 12-20. Harvard University Press.
★ H. M. Sheffer, 1913. "A set of five independent postulates for Boolean algebras, with application to logical constants," ''Transactions of the American Mathematical Society 14'': 481-488.
★ http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/nand.html
The 'Sheffer stroke', written "|" or "↑", in the subject matter of boolean functions, propositional calculus, sentential calculus, or zeroth order logic denotes a logical operation that is equivalent to the negation of the conjunction operation, expressed in ordinary language as "not both". It is also called the 'alternative denial', since it says in effect that at least one of its operands is false. In Boolean algebra and digital electronics it is known as the 'NAND operation' ("not and").
Like 'NOR' alone, it is one of the two sole sufficient operators or functionally complete binary operators which can be used to express all of the boolean functions of propositional logic.
Definition
The 'NAND operation' is a logical operation on two logical values, typically the values of two propositions, that produces a value of ''false'' if and only if both of its operands are true. In other words, it produces a value of ''true'' if and only if at least one of its operands is false.
Truth table
The truth table of 'p NAND q' (also written as 'p | q' or 'p ↑ q') is as follows:
| p | q | ↑ |
|---|---|---|
| T | T | F |
| T | F | T |
| F | T | T |
| F | F | T |
Venn diagram
The Venn Diagram of "A nand B" (the white area is the area covered by NAND).
History
The stroke is named for Henry M. Sheffer, who proved (Sheffer 1913) that all the usual operators of propositional logic (not, and, or, implies, and so on), could be expressed in terms of it. Charles Peirce (1880) had discovered this fact more than 30 years earlier, but never published his finding. Peirce also observed that all boolean operators could be defined in terms of the NOR operator, the dual of NAND.
Properties
Nand does not possess any of the following five properties, each of which is required to be absent from at least one member of a set of functionally complete operators: truth-preservation, falsity-preservation, linearity, monotonicity, self-duality. An operator is truth- (falsity-) preserving if its value is truth (falsity) whenever all its arguments are truth (falsity).
Symbol
One way of expressing ''p'' NAND ''q'' is as , where the symbol signifies ''AND'' and the line over the expression signifies ''not'', the logical negation of that expression.
Natural Language/Rhetoric/Colloquial usage
NAND is not used in everyday sentences because it exhibits an inherent inversion, which makes it confusing like a double negative. Here's an example of a sentence using:
:NAND operator: ''We will surely die if we have food 'nand' water.''
:Common terms: ''We will surely die if we do not have both food and water.''
Introduction, elimination, and equivalencies
The Sheffer stroke "|" is equivalent to the negation of conjunction:
:
Expressed in terms of NAND, the usual operators of propositional logic are:
| "not ''p''" is equivalent to "''p'' NAND ''p''" | |
| "''p'' and ''q''" is equivalent to "(''p'' NAND ''q'') NAND (''p'' NAND ''q'')" | |
| "''p'' or ''q''" is equivalent to "(''p'' NAND ''p'') NAND (''q'' NAND ''q'')" | |
| "''p'' implies ''q''" is equivalent to "(''p'' NAND ''q'') NAND ''p''" |
NAND gate
| 'INPUT' A B | 'OUTPUT' A NAND B | |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NAND Full adder
The 'NAND gate' is a digital logic gate that behaves in a manner that corresponds to the truth table to the left. A LOW output results only if both the inputs to the gate are HIGH. If one or both inputs are LOW, a HIGH output results.The nand gate is a universal gate in the sense that any boolean function can be implemented by nand gates.
Digital systems employing certain logic circuits take advantage of NAND's functional completeness. In complicated logical expressions, normally written in terms of other logic functions such as AND, OR, and NOT, writing these in terms of NAND saves on cost, because implementing such circuits using NAND gate yields a more compact result than the alternatives.
Symbols
There are two symbols for NAND gates: the 'military' symbol and the 'rectangular' symbol. For more information see logic gate symbols.
'Military' NAND symbol
'Rectangular' NAND symbol
Hardware description and pinout
NAND gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs.
This schematic diagram shows the arrangement of NAND gates within a standard 4011 CMOS integrated circuit.
CMOS version
The standard, 4000 series, CMOS IC is the 4011, which includes four independent, two-input, NAND gates.
Availability
These devices are available from most semiconductor manufacturers such as Fairchild Semiconductor, Philips or Texas Instruments. These are usually available in both through-hole DIL and SOIC format. Datasheets are readily available in most datasheet databases.
The standard 2-, 3-, 4- and 8-input NAND gates are available:
★ CMOS
★
★ 4011: Quad 2-input NAND gate
★
★ 4023: Triple 3-input NAND gate
★
★ 4012: Dual 4-input NAND gate
★
★ 4068: Mono 8-input NAND gate
★ TTL
★
★ 7400: Quad 2-input NAND gate
★
★ 7410: Triple 3-input NAND gate
★
★ 7420: Dual 4-input NAND gate
★
★ 7430: Mono 8-input NAND gate
Implementations
The NAND gate is the easiest to manufacture, and also has the property of functional completeness. That is, any other logic function (AND, OR, etc.) can be implemented using only NAND gates. An entire processor can be created using NAND gates alone.
 thumb |  TTL NAND gate |
Formal system based on the Sheffer stroke
The following is an example of a formal system based entirely on the Sheffer stroke, yet having the functional expressiveness of the propositional logic:
Symbols
A B C D E F G '
( | )
The Sheffer stroke commutes but does not associate. Hence any formal system including the Sheffer stroke must also include a means of indicating grouping. We shall employ '(' and ')' to this effect.
Syntax
The letters A, B, C, D, E, F and G are atoms.
Any of these letters primed once or several times is also an atom (e.g. A', B′′, C′′′, D′′′′ are atoms).
''Construction Rule I:'' An atom is a well-formed formula (''wff'').
''Construction Rule II:'' If X and Y are wffs, then (X|Y) is a wff.
''Closure Rule:'' Any formulae which cannot be constructed by means of the first two Construction Rules is not a wff.
The letters U, V, X, and Y are metavariables standing for wffs.
A decision procedure for determining whether a formula is well-formed goes as follows: "deconstruct" the formula by applying the Construction Rules backwards, thereby breaking the formula into smaller subformulae. Then repeat this recursive deconstruction process to each of the subformulae. Eventually the formula should be reduced to its atoms, but if some subformula cannot be so reduced, then the formula is not a wff.
Axiom
The following ''wff''s are axiom schemata, which become axioms upon replacing all metavariables with ''wff''s.
''THEN-1:'' (U|(U|(V|(U|U))))
Inference rules
''Substitution of equivalents''. Let the wff X contain one more instances of the subformula U. If U=V, then replacing one ore more instances of U in X by V does not alter the truth value of X. In particular, if X=Y is a theorem, this remains the case after any substitution of V for U.
''Commutativity:'' (X|Y) = (Y|X)
''Duality:'' If strings of the forms X and (X|X) both show up in a theorem, then if these two strings are swapped wherever they appear in the theorem, then the result will also be a theorem.
''Double Negation:'' ((X|X)|(X|X)) = X
''Mimesis:'' (U|(X|X)) = (U|(U|X))
''THEN-3:'' (U|(U|(V|(V|X)))) = (V|(V|(U|(U|X))))
''MP-1:'' U, (U|(V|X)) |- V
''MP-2:'' U, (U|(V|X)) |- X
Note. The formula (U|(V|X)) has the interpretation U→V∧X. Modus ponens is the special case of MP-1 and MP-2 when V and X are identical.
Simplification
Since the only connective of this logic is |, the symbol | could be discarded altogether, leaving only the parentheses to group the letters. A pair of parentheses must always enclose a pair of ''wff''s. Examples of theorems in this simplified notation are
: (A(A(B(B((AB)(AB)))))),
: (A(A((BB)(AA)))).
The resemblance to the syntax of LISP is evident.
The notation can be simplified further, by letting
: (U) := (UU)
: ((U)) U
for any U. This simplification causes the need to change some rules: (1) more than two letters are allowed within parentheses, (2) letters or wffs within parentheses are allowed to commute, (3) repeated letters or wffs within a same set of parentheses can be eliminated. The result is a parenthetical version of the Peirce existential graphs.
See also
★ Ampheck
★ AND gate
★ Boolean domain
★ CMOS
★ Laws of Form
★ Logic gate
★ Logical graph
★ NOR gate
★ NOT gate
★ OR gate
★ Peirce's law
★ Peirce arrow = NOR
★ Propositional logic
★ Sole sufficient operator
★ XOR gate
★ Zeroth order logic
References
★ Charles Peirce, 1880. 'A Boolean Algebra with One Constant'. In Hartshorne, C, and Weiss, P., eds., (1931-35) ''Collected Papers of Charles Sanders Peirce, Vol. 4'': 12-20. Harvard University Press.
★ H. M. Sheffer, 1913. "A set of five independent postulates for Boolean algebras, with application to logical constants," ''Transactions of the American Mathematical Society 14'': 481-488.
External Links
★ http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/nand.html
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psst.. try this: add to faves
