SELF-ALIGNED GATE

In fabrication of MOSFETs on integrated circuits, a 'self-aligned gate' is a design arrangement where the edges of the source and drain doping regions next to the gate are defined by the same mask that defines the edges of the gate next to the source and drain regions.
Without a self-aligned gate an overlap is required between the source and drain regions in the design and the gate (a small overlap results even with a self-aligned gate because dopants defuse under the gate). This increases parasitic capacitance and therefore reduces performance.